[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler

David Peixotto dpeixott at codeaurora.org
Fri Nov 1 12:33:29 PDT 2013


> The ".space" directive could be very useful in making the test more
> manageable.

Ah, yes that is a great suggestion. Thank you!

> Other than that I'd be wary of instructions that might be relaxed during
> object emission and suddenly make a load out of range. LLVM seems to do
> this for Bcc, pc-relative loads, ADR and B. It's getting towards
> implementation details but you'll want to bear it in mind when adding
> tests for any implementation.

Ok, thanks I will keep that in mind. Sounds like it could be tricky to write
a test for it, but I will try.

> One question that's occurred is can this support PIC when you reference
> other sections? That may well affect the relocation used.
> 
> ARM's own assembler may be able to (it certainly has --apcs=...
> options that can tell it it's compiling PIC code). I can't recall a
> similar command-line option to llvm-mc, but Clang-as-assembler probably
> accepts -fPIC.
> 
> Goodness knows whether we want to do anything with it though.

Hmm, yes I had not considered that. It's a good question.

> (from Jim)
> > What does ARM's documentation say?
> 
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473c/Bgbbf
> gia.html
> 
> Fairly similar, though it doesn't seem to use a MOV opportunistically.

I did notice the use of movw by armasm when comparing to gcc. I never did
observe gcc using movw and I was planning to follow that for the first step.
I think using movw would be a useful follow-on optimization.




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