[LLVMdev] Definition of RegisterClass for load instruction in Thumb2

[Tim Northover]

Hi,

> What is the main reason of allowing this inconsistency in the td file? I guess that's because of the "some" distinction between the writeback and non-writeback versions.

I think so. LLVM is a bona-fide assembler as well as being a compiler, and a user will expect to be able to assemble the odd, different corner cases even if they're useless to a compiler (because SP is reserved for a special use, for example).

> Is there any benefit from the inconsistency by using GRP in .td file and freezing lr and pc during register allocation in writeback version? 

I don't think there's any direct benefit in this case (since it's wrong) but in general it's the only way to get the assembler to behave properly.

Cheers.

Tim.