[LLVMdev] Combining physical registers

[Krzysztof Parzyszek]

The function TII::canCombineSubRegIndices has been gone for a while now, 
and I was wondering if there is a target-independent way of determining 
if a certain set of physical registers "adds up" to a larger register. 
For example, on X86, AL and AH together form AX.  On Hexagon, R0 and R1 
are D0.
The context here is an attempt to coalesce multiple loads/stores into 
fewer loads/stores using larger registers.

It is my understanding that register lane masks are not exact in a sense 
that they will tell me if two register lanes alias, but not necessarily 
if a set of masks adds up to a full register.  Is this correct?

-Krzysztof

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