[LLVMdev] LLVM ERROR: Cannot select

Zhiyuan Ren zyrevo at gmail.com
Mon May 13 12:46:08 PDT 2013


Duncan,

I am opening a bugreport. In the meanwhile, here are two Ada source files
for the test case.

this compiles fine.
gcc -c -gnatws -I./ -gnatA -x ada llvm_bug_rzy.ada

this does not.
gcc -c -gnatws -fplugin=/usr/lib/dragonegg.so -I./ -gnatA -x ada
llvm_bug_rzy.ada

I am using gcc (GCC) 4.6.3 20120306 (Red Hat 4.6.3-2)

Thanks,
ZY


On Sun, May 12, 2013 at 4:12 AM, Duncan Sands <baldrick at free.fr> wrote:

> Hi ZY,
>
>
> On 11/05/13 22:21, Zhiyuan Ren wrote:
>
>> Duncan,
>>
>> here is part of the assembly around the problem area. I used gcc -S -flto
>> to
>> generate the .s file, llvm-as on the .s fiile will show error: invalid
>> cast
>> opcode for cast from 'i40' to 'float'  %638 = trunc i40 %637 to float
>>
>> %633 = bitcast i8* %632 to float*
>>    %634 = bitcast float* %633 to i40*
>>    %635 = load i40* %634, align 1
>>    %636 = shl i40 %635, 7
>>    %637 = ashr i40 %636, 8
>>    %638 = trunc i40 %637 to float
>>
>
> this looks like a dragonegg bug.  Can you please open a bugreport at
>   http://llvm.org/bugs/
> and attach the problematic Ada code.  Please also indicate how you compiled
> it, and which version of gcc you are using.
>
> Thanks, Duncan.
>
>
>> Thanks,
>> ZY
>>
>>
>> On Sat, May 11, 2013 at 3:49 PM, Duncan Sands <baldrick at free.fr
>> <mailto:baldrick at free.fr>> wrote:
>>
>>     Hi ZY,
>>
>>
>>     On 11/05/13 20:37, Zhiyuan Ren wrote:
>>
>>         Duncan,
>>
>>         Thanks for getting back to me. I am not sure how to find the
>> original
>>         bitcode
>>         (and related Ada source code) that causes the truncate. This is
>> the error
>>         message that gcc gave me when I tried to compile an Ada source
>> file using
>>         dragonegg plugin (gcc -c -fplugin...).
>>
>>
>>     use -S instead of -c and add -flto
>>     The resulting .s file contains the bitcode.  Please send in the file.
>>
>>     Ciao, Duncan.
>>
>>
>>         ZY
>>
>>         ps, sorry for multiple emails, trying to find out how to reply to
>> a
>>         thread in
>>         the mailing list
>>
>>
>>         On Sat, May 11, 2013 at 12:42 PM, Duncan Sands <baldrick at free.fr
>>         <mailto:baldrick at free.fr>
>>         <mailto:baldrick at free.fr <mailto:baldrick at free.fr>>> wrote:
>>
>>              Hi ZY,
>>
>>
>>              On 10/05/13 22:34, Zhiyuan Ren wrote:
>>
>>                  Hello, I am new to LLVM and doing some experiment with
>> 3.2 on
>>         Ada code. Can
>>                  anyone help me on the following error message?
>>
>>
>>              a truncate from an i32 to an f32 is not valid.  This caused
>> the
>>         code generator
>>              to abort.  What is the original bitcode that caused this?
>>
>>              Ciao, Duncan.
>>
>>
>>                  Thanks,
>>                  ZY
>>
>>
>>                  LLVM ERROR: Cannot select: 0xa7a0bf0: f32 = truncate
>> 0xa7a5ea8
>>         [ID=24]
>>                      0xa7a5ea8: i32 = X86ISD::SHLD 0xa790280, 0xa790390,
>>         0xa76e088 [ID=22]
>>                        0xa790280: i32,ch = load 0xa7386a0, 0xa7a68d8,
>>         0xa7a5628<LD1[%1482+4],
>>                  anyext from i8> [ID=19]
>>                          0xa7a68d8: i32 = add 0xa7a6040, 0xa7a11c8 [ID=15]
>>                            0xa7a6040: i32,ch = CopyFromReg 0xa7386a0,
>> 0xa790c98
>>         [ORD=741]
>>                  [ID=12]
>>                              0xa790c98: i32 = Register %vreg7 [ORD=741]
>> [ID=3]
>>                            0xa7a11c8: i32 = Constant<13> [ID=7]
>>                          0xa7a5628: i32 = undef [ORD=737] [ID=2]
>>                        0xa790390: i32,ch = load 0xa7386a0, 0xa7a57c0,
>>                  0xa7a5628<LD4[%1482](align=1)> [ID=20]
>>                          0xa7a57c0: i32 = add 0xa7a6040, 0xa7a5f30 [ID=16]
>>                            0xa7a6040: i32,ch = CopyFromReg 0xa7386a0,
>> 0xa790c98
>>         [ORD=741]
>>                  [ID=12]
>>                              0xa790c98: i32 = Register %vreg7 [ORD=741]
>> [ID=3]
>>                            0xa7a5f30: i32 = Constant<9> [ID=5]
>>                          0xa7a5628: i32 = undef [ORD=737] [ID=2]
>>                        0xa76e088: i8 = Constant<31> [ID=6]
>>
>>
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