[LLVMdev] [PATCH] RegScavenger::scavengeRegister

[Jakob Stoklund Olesen]

On Mar 25, 2013, at 2:51 PM, Akira Hatanaka <ahatanak at gmail.com> wrote:

> Yes, it sounds like it will solve the problem.
> 
> Using the following example where live ranges of accumulators $vreg_acc0 and $vreg_acc1 conflict,
> 
> MULT $vreg_acc0, $vreg_gpr0, $vreg_gpr1
> MULT $vreg_acc1, $vreg_gpr2, $vreg_gpr3
> 
> (consumer of $vreg_acc1)
> (consumer of $vreg_acc0)
> 
> if the register can create new virtual registers $vreg_gpr4 and $vreg_gpr5, I think spilling can be avoided:
> 
> 
> MULT $vreg_acc0, $vreg_gpr0, $vreg_gpr1
> copy $vreg_gpr4, $vreg_acc0:lo // spill lo
> copy $vreg_gpr5, $vreg_acc0:hi // spill hi
> MULT $vreg_acc1, $vreg_gpr2, $vreg_gpr3
> 
> (consumer of $vreg_acc1)
> copy $vreg_acc0:lo, $vreg_gpr4 // restore lo
> copy $vreg_acc0:hi, $vreg_gpr5 // restore hi
> (consumer of $vreg_acc0)

The cross class spilling doesn't support spilling to multiple registers, though. I thought you could copy the accumulator to a single 64-bit register.

> Also, should RA avoid splitting live intervals of accumulators, which creates copy instructions?

The alternative to live range splitting is spilling, which is usually worse.

/jakob