[LLVMdev] LLVM x86 backend for Intel MIC : trying it out and questions

[Demikhovsky, Elena]

32-bit code will work. ICC does not generate 32-bit KNC code. OS is 64-bit.

-  Elena


-----Original Message-----
From: Dmitry Mikushin [mailto:dmitry at kernelgen.org] 
Sent: Monday, July 15, 2013 16:04
To: Demikhovsky, Elena
Cc: LLVM Developers Mailing List; Rackover, Zvi
Subject: Re: [LLVMdev] LLVM x86 backend for Intel MIC : trying it out and questions

Hello Elena,

> There is no 32-bit KNC.

Are you sure about this? From "System V Application Binary Interface K1OM Architecture Processor Supplement Version 1.0", p. 124:

| A.1 Execution of 32-bit Programs
|
| The K1OM processors are able to execute 64-bit K1OM and also 32-bit
ia32 programs.

I'm really really looking for this opportunity, because we want to extend our kernel code generation capabilities [1] with MIC support.

> No, 256-bit vectors are not supported. KNC is scalar ISA (Knights 
> Corner supports a subset of the Intel 64 Architecture instructions) + 
> 512-bit vectors + masks

Of course, 512-bit, that was my typo, sorry.

> Please check what ICC does. X87 registers are supported.

Checked. Unfortunately ICC does use zmm in scalar 64-bit programs, which requires new ABI in LLVM.

- D.

[1] http://www.old.inf.usi.ch/file/pub/75/tech_report2013.pdf
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