[LLVMdev] introducing sign extending halfword loads into the LLVM IR

[Krzysztof Parzyszek]

On 1/21/2013 5:18 PM, Jim Grosbach wrote:
>
> That is odd. Lots of in-tree targets have sext-loads that do the right
> thing. ARM and X86, for example.

I've seen similar issues before, and the problem was remedied by marking 
16-bit words as native in the data layout string.

-Krzysztof

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