[LLVMdev] Splitting live ranges of half-defined registers

[Jakob Stoklund Olesen]

On Jan 14, 2013, at 1:39 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:

> On 1/14/2013 3:16 PM, Jakob Stoklund Olesen wrote:
>> 
>> On Jan 14, 2013, at 12:56 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:
>>> 
>>> My question is: is this something that was a part of the design?
>> 
>> Yes, the register allocator only deals in full-width virtual registers, so any copies or spills created will operate on the full register.
> 
> I see.
> 
> Unfortunately, this is causing some customer code to fail in compilation.  The direct cause of the compilation failure is a complaint from the register scavenger in the scenario that I described in the first email.

It shouldn't be causing any compile time failures, the VirtRegRewriter is adding <imp-def> operands for the wide register to make it look like it is live everywhere the virtual register was live:

 vreg(64).low_half = vreg(32)  // vreg(64) = 64-bit register

Should be rewritten as:

 physreg(32) = other-physreg(32), physreg(64)<imp-def>

In the worst case, you should get a 64-bit copy instruction where a 32-bit copy would have been sufficient.

It is quite common for post-RA passes to get the <imp-def> operands wrong. It's really hard to get it right.

The machine code verifier (llc -verify-machineinstrs) can find these errors.

/jakob