[LLVMdev] Splitting live ranges of half-defined registers

[Jakob Stoklund Olesen]

On Jan 14, 2013, at 12:56 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:

> I have already written about something similar (either on the list, or in private communication), so this may look familiar.
> 
> Here's a scenario I'm observing:
> 
> First, we have some innocent looking code:
>   vreg(32) = x                  // vreg(32) = 32-bit register
>   ... = vreg(32)
>   [...]
>   vreg(64).low_half = vreg(32)  // vreg(64) = 64-bit register
>   [...]
> 
> then, after register coalescing:
>   vreg(64).low_half = x
>   ... = vreg(64).low_half
>   [...]
>   [etc.]
> 
> then, the live range of the 64-bit vreg is split during register allocation:
>   vreg'(64).low_half = x     // first live range starts
>   ... = vreg'(64).low_half
>   vreg"(64) = vreg'(64)      // next live range starts
>   [...]
> 
> The problem is that vreg' only has half of it defined, and so the assignment vreg" = vreg' copies a register which has half of it undefined.
> 
> 
> My question is: is this something that was a part of the design?

Yes, the register allocator only deals in full-width virtual registers, so any copies or spills created will operate on the full register.

The coalescer can do some tricks by tracking partially defined registers, more so in LLVM 3.2 than earlier releases.

I would like to make it possible to track independent live ranges for each lane of a vector register. That would help both coalescing and RA, but it is a major project.

/jakob