[LLVMdev] Does loop vectorizer inquire about target's SIMD capabilities?

[Akira Hatanaka]

Nadav (or anyone who is familiar with the loop vectorizer),

Does the current loop vectorizer inquire about the SIMD capabilities of the
target architecture when it decides whether it is profitable to vectorize a
loop? I am asking this because I would like to have loop vectorization
disabled for targets that don't support SIMD instructions (for example,
standard mips32). Loop vectorization bloats the code size and prolongs
compilation time without any improvement to performance for such targets.
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