[LLVMdev] Is it possible to define a LLVM intrinsic that expands in more than one instructions ?

[Justin Holewinski]

Sure, a back-end is free to expand an intrinsic into as many instructions
as it wishes.  You can define this in TableGen with a pattern:

def : Pat<(my_intrinsic Reg:$a, Reg:$b), (MyInst1 (MyInst2 Reg:$a),
Reg:$b)>;

This would expand a call to @llvm.my_intrinsic(a, b) to:

r1 = MyInst2 $a
r2 = MyInst1 r1, $b



On Wed, Feb 20, 2013 at 8:09 AM, Sebastien DELDON-GNB <
sebastien.deldon at st.com> wrote:

> Hi all,****
>
> ** **
>
> Is it possible to define a LLVM intrinsic that expands in more than one
> instructions ?****
>
> If yes, how ?****
>
> ** **
>
> Best Regards****
>
> Seb****
>
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>


-- 

Thanks,

Justin Holewinski
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