[LLVMdev] TargetSpec

[Schoedel, Kevin P]

This is about the target specification proposal described in
  http://nondot.org/sabre/LLVMNotes/TargetSpec.txt

At the end of the year I spent a while on this, partly as a foot-wetting
exercise for parts of LLVM I wouldn't otherwise look at. I did a partial
implementation; enough to understand most of the issues (I hope) and get
a clear idea of what would need to be done to phase it in. I expect to
have adequate time over the coming months to do the necessary work.

The first open problem comes from two points in TargetSpec.txt:

> Some high level design points:
>  - The new class will live in libsupport and thus cannot use anything
>    from codegen or other higher level libraries.

and

> The biggest source of ugliness here is that we have to have a giant
> table of target features (SSE4!) and arch specific CPU names. This is
> already running through tblgen and should continue to do that. We can
> even extend it to reason about OS's etc.

The problem here is that tblgen depends on Support. I'm looking for
guidance on the right thing to do here, and (depending on the answer)
possibly some suggestions on getting the build systems to do it.

-- 
Kevin Schoedel kevin.p.schoedel at intel.com +1-519-772-2580
SSG-DPD-ECDL-DMP - Intel Dynamic Mobility and Parallelism