[LLVMdev] Is there any llvm neon intrinsic that maps to vmla.f32 instruction ?

[Renato Golin]

On 8 February 2013 10:40, Sebastien DELDON-GNB <sebastien.deldon at st.com>wrote:

> Hi all,****
>
> ** **
>
> Everything is in the tile, I would like to enforce generation of vmla.f32
> instruction for scalar operations on cortex-a9, so is there a LLMV neon
> intrinsic available for that  ?****
>
>
Hi Sebastien,

LLVM doesn't use intrinsics when there is a clear way of representing the
same thing on standard IR. In the case of VMLA, it is generated from a
pattern:

%mul = mul <N x type> %a, %b
%sum = add <N x type> %mul, %c

So, if you generate FAdd(FMull(a, b), c), you'll probably get an FMLA.

It's not common, but also not impossible that the two instructions will be
reordered, or even removed, so you need to make sure the intermediate
result is not used  (or it'll probably use VMUL/VADD) and the final result
is used (or it'll be removed) and keep the body of the function/basic block
small (to avoid reordering).

cheers,
--renato
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130208/43ea9177/attachment.html>