[LLVMdev] Vectorizer using Instruction, not opcodes

David Tweed David.Tweed at arm.com
Tue Feb 5 03:22:47 PST 2013


Hi Renato,

On 5 February 2013 11:03, David Tweed <david.tweed at arm.com<mailto:david.tweed at arm.com>> wrote:
since the more instructions there
are the more an out-of-order CPU can put them into otherwise unused slots. I
can't think of a way of figuring out such a mapping other than empirically.


> Given the amount of uncertainty on these OOO guesses, I don't think we can get anything worth trying, even empirically. The noise will always outweigh the signal.

> You can normally save a few cycles on a static micro-benchmark and think you're in control, but you normally don't evaluate the exact impact that the same guess had on other benchmarks or real code. Since this is auto-vectorization, it'll be hard to
>  compare, but more so to evaluate the overall impact on the rest.

That may be the case. Just to be clear I was thinking of something incredibly simple along the lines of (cost) ^ (min(1-alpha*noOfINstructions,floorTheshold)) for some values of alpha and floorThreshold. I'll probably have a look at this when I next get some discretionary time, but that wont' be for a couple of months. Having said that, it may turn out that it doesn't really matter in that the more vector instructions you've got the higher the likelihood it will have a lower cost than a scalar version.
ave

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