[LLVMdev] Storage-Only Register Class?

[Jim Grosbach]

Hi Justin,

This is a big weakness of the current SelectionDAG infrastructure. There's not a really clean way to do this. The legalizer assumes that if a type is "legal" at all, the target can do at least basic arithmetic on that type.

Theoretically, your approach of setting the operations to "TargetLowering::Promote" for i8 should work. I think it would be reasonable to fix SelectionDAG to allow that. It's probably a non-trivial task, though.

-Jim

On Aug 8, 2013, at 7:35 AM, Justin Holewinski <justin.holewinski at gmail.com> wrote:

> Is there a way to define a register class that is storage-only?  I want to have an i8 register class that I can use for loads/stores/converts, but that does not support arithmetic.
> 
> It seems addOperationAction(ISD::ADD, MVT::i8, Promote) and SetPromotedToType(ISD::ADD, MVT::i8, MVT::i16) are not sufficient, as the legalizer just looks at whether or not the underlying type is legal (which it is).  So come instruction selection time I still have i8 adds.  Do I need to custom handle all 8-bit arithmetic, or is there some way to have the legalizer do the promotion like it would for an illegal type?
> 
> 
> -- 
> 
> Thanks,
> 
> Justin Holewinski
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