[LLVMdev] tablegen question

[Ahmed Bougacha]

On Wed, Aug 7, 2013 at 1:32 AM, Jeroen Dobbelaere
<Jeroen.Dobbelaere at synopsys.com> wrote:
> Hi,
>
> I am trying to make my tablegen files more flexible and for that I would like to have a name that in the end will be replaced with
> a type.
>
> If tablegen would support c preprocssing, I would do it like this:
>
> ---
> #define myBaseType  i32
> ...
> def imm32 : Operand<myBaseType>;
> def immZExt10 : ImmLeaf<myBaseType, [{return isUInt<10>(Imm);}]>;
> ...
> ---
>
> Is there a way to achieve something like this with tablegen ?

You could maybe define a class, def an instance at the top-level, and
access the member you care about (using dot notation).
Depending on how far you want to push it, things like #if trickery can
be done using equivalent tablegen (!if, ..) when defining the
instance.

-- Ahmed

> Greetings,
>
> Jeroen Dobbelaere
>
>
>
>
>
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