[LLVMdev] Another missed optimization opportunity?

[Duncan Sands]

Hi Scott,

On 24/04/13 19:40, Scott Pakin wrote:
> I was suprised to find that some bitcode I'm generating isn't getting
> optimized.  Here, I'm doing the equivalent of "myarray[5]++" (on an
> "extern int *myarray"), repeated three times:

does your bitcode contain data layout information?

Ciao, Duncan.

>
>      @myarray = external global i32*
>
>      define void @update_array() #0 {
>        %1 = load i32** @myarray, align 8
>        %2 = getelementptr inbounds i32* %1, i64 5
>        %3 = load i32* %2, align 4
>        %4 = add nsw i32 %3, 1
>        store i32 %4, i32* %2, align 4
>        %5 = load i32** @myarray, align 8
>        %6 = getelementptr inbounds i32* %5, i64 5
>        %7 = load i32* %6, align 4
>        %8 = add nsw i32 %7, 1
>        store i32 %8, i32* %6, align 4
>        %9 = load i32** @myarray, align 8
>        %10 = getelementptr inbounds i32* %9, i64 5
>        %11 = load i32* %10, align 4
>        %12 = add nsw i32 %11, 1
>        store i32 %12, i32* %10, align 4
>        ret void
>      }
>
> Running "opt -std-compile-opts" or even "opt -O3" doesn't seem to
> change the bitcode any.  I had expected the three increments by 1 to
> be collapsed into a single increment by 3:
>
>      @myarray = external global i32*
>
>      define void @update_array() #0 {
>        %1 = load i32** @myarray, align 8
>        %2 = load i32* %1, align 4
>        %3 = add nsw i32 %2, 3
>        store i32 %3, i32* %1, align 4
>        ret void
>      }
>
> Even the (x86-64) code generator doesn't do any last-minute
> optimizations:
>
>      movq    myarray(%rip), %rax
>      incl    20(%rax)
>      movq    myarray(%rip), %rax
>      incl    20(%rax)
>      movq    myarray(%rip), %rax
>      incl    20(%rax)
>
> This is with LLVM revision 180116.
>
> Is there some semantic reason that the increments aren't allowed to be
> combined, or is this a missed optimization opportunity in LLVM?
>
> Thanks,
> -- Scott
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