[LLVMdev] funny llvm bug

[Reed Kotler]

On 04/19/2013 02:43 PM, Rafael Espíndola wrote:
>> I have not looked at how gcc implements this internally but in LLVM I'm
>> creating real IR for a function (the stub being in mips32 mode; even though
>> the rest of the compilation unit is being compiled in mips16 mode). This is
>> one (not the only) reason why I implemented the ability to switch processor
>> modes on a per function basis.
>
> Now that I see where this is from, why don't you add an attribute
> (calling convention?) to the function saying it is a thunk and then
> the mips backend can print the correct assembly to put it in a
> separate section with the correct flags.
>
> This looks somewhat similar to some functions being printed to
> different comdat sections. Follow the compilation of
>
> define weak_odr void @bar() {
>    ret void
> }
>
> noticed how the IL has no explicit section, but the assembly has
>
> .section .text.bar,"axG", at progbits,bar,comdat
>
>
> Cheers,
> Rafael
>
weak_odr is predefined in llvm AsmPrinter

that will get handled in AsmPrint::EmitLinkage

EmitFunctionHeader is not a virtual function and that is where the 
segment gets switched.

It's possible that we can emit another .section directive in 
EmitFunctionEntryLabel

I'll have to play around with this.

Thanks for the ideas (from you and others).

Reed