[LLVMdev] MachineOperand SubReg

[dag at cray.com]

Jakob Stoklund Olesen <stoklund at 2pi.dk> writes:

>> A MachineOperand has both a getReg() and a getSubReg() interface.
>> For a physical register operand, is getReg() guaranteed to be the
>> "most super" register with getSubReg() providing the specific
>> subregister information for the operand?  If so then for my current
>> purposes it seems I don't need to worry about subregisters at all.
>
> For physregs, getSubReg() is guaranteed to be 0. It is only used for
> virtual registers.

Aha!  So for physregs, getSubReg() will simply be the exact physical
register defined.  Cool, that'll work.

> Yep, there is no such thing as a 'most super' register. The register
> aliasing graph is not a tree. The graph of sub/super-register
> relationships is also not a tree, it is a DAG.

Hmm.  I don't doubt it but can you give me an example of a case where
there is no "most super" register?  I'm having a hard time thinking up
how one would design such an ISA.  Need to increase my edjimucation.

> We try to track anything related to register aliasing in terms of
> register units. See MCRegisterInfo.h and TargetRegisterInfo.h. I
> believe regunits are equivalent to maximal cliques of the register
> aliasing graph if you're mathematically inclined.

Ok, I'll check that out.  MCRegisterInfo.h is new to me.

> I think it is easier to think about them as minimal sub-registers,
> even if that is not always completely accurate.

I'm not completely sure what you mean here.

Thanks for your help Jakob!

                          -David