[LLVMdev] MachineOperand SubReg

[dag at cray.com]

I'm working on the post-regalloc dataflow engine I mentioned yesterday.
Currently I only need to track register operands.

A MachineOperand has both a getReg() and a getSubReg() interface.  For a
physical register operand, is getReg() guaranteed to be the "most super"
register with getSubReg() providing the specific subregister information
for the operand?  If so then for my current purposes it seems I don't
need to worry about subregisters at all.

For reaching definitions I think simply tracking definitions via super
registers should be sufficient.  Even if a definition defines a
subregister I can consider it to define the "most super" register.  This
will be pessimistic for cases like x86 AH/AL, but I hardly care about
those at the moment.  :) If MachineOperand already tracks the "most
super" register then things look pretty simple as far as explicitly
defined registers go.

Anyone see any problem with this?

Thanks!

                        -David