[LLVMdev] Pat operands matching example in ppc

Sam Parker S.Parker3 at lboro.ac.uk
Sun Apr 7 02:24:14 PDT 2013


Hi Anitha,

memri is just describing that the address contains two components, an 
immediate and a register, and how to handle them in the instruction 
printer. The STWU expects a memri operand, and that is what is passed 
from the Pat.

Hope that helps,
Sam

On 07/04/2013 10:19, Anitha B Gollamudi wrote:
> Hi,
>
>
> How do "Pat" operands get matched? I am trying to follow the example 
> given in http://llvm.org/docs/CodeGenerator.html#selectiondag-process
>
> In the latest trunk of ppcintrinfo.td <http://ppcintrinfo.td> 
> following pattern is defined:
>
> def : Pat<(pre_store i32:$rS, iPTR:$ptrreg, iaddroff:$ptroff),
>               (STWU $rS, iaddroff:$ptroff, $ptrreg)>;
>
> I understand that input operand list i.e. ins of stwu should get 
> matched with the given pre_store. But I am confused as to how  
> "ptroff" and "ptrreg" get matched with "memri" used in STWU?
>
>
> For reference[1] memri is defined as:
>
> def memri :Operand<iPTR> {
>
> 	let PrintMethod = "printMemRegImm";
>
> 	let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg);
>
> 	let EncoderMethod = "getMemRIEncoding";
>
> }
>
> [1] 
> https://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?view=markup
> -- 
> /* Anitha*/
>
>
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