[LLVMdev] [PATCH] RegScavenger::scavengeRegister

Hal Finkel hfinkel at anl.gov
Sat Apr 6 00:42:11 PDT 2013


----- Original Message -----
> From: "Jakob Stoklund Olesen" <stoklund at 2pi.dk>
> To: "Akira Hatanaka" <ahatanak at gmail.com>
> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, "Hal Finkel" <hfinkel at anl.gov>
> Sent: Tuesday, March 26, 2013 12:40:44 PM
> Subject: Re: [LLVMdev] [PATCH] RegScavenger::scavengeRegister
> 
> 
> On Mar 26, 2013, at 10:29 AM, Akira Hatanaka <ahatanak at gmail.com>
> wrote:
> 
> > The size of general purpose integer registers for mips32 is 32-bit
> > and accumulators are 64-bit registers consisting of 32-bit hi/lo
> > register pairs. So you will need two instructions to copy two
> > 32-bit GPR registers to a 64-bit accumulator register. If spilling
> > to multiple registers is unsupported, perhaps I can I define a new
> > register class consisting of paired GPR registers and pseudo copy
> > instructions?
> 
> Yes, that would work. Look at the ARM GPRPair register class.

In the PPC case, for CR spilling, the CRs are only really 4 bits; I'd need to define 8-tuples just to pair with 32-bit GPR registers. Under normal circumstances, i32 is the smallest legal type. Instead, to make this work, would I define a 4-bit subregister of the GPRs to hold the data (or maybe 8 bits, and then also use some CR-pair register class)?

Thanks again,
Hal

> 
> You don't need pseudo copy instructions, TII::copyPhysReg() is
> allowed to insert multiple instructions.
> 
> > > Also, should RA avoid splitting live intervals of accumulators,
> > > which creates copy instructions?
> > 
> > The alternative to live range splitting is spilling, which is
> > usually worse.
> > 
> > Here I was assuming register allocator will spill accumulator
> > registers to integer registers instead of directly to stack. In
> > that case, splitting might be worse than spilling since reload
> > requires two GPR-to-accumulator copy instructions while copying
> > one accumulator to another requires four copy instructions
> > (instruction set doesn't have any accumulator-to-accumulator copy
> > instructions):
> > 
> > copy $vreg_gpr0, $vreg_acc0:lo
> > copy $vreg_gpr1, $vreg_acc0:hi
> > copy $vreg_acc1:lo, $vreg_gpr0
> > copy $vreg_acc1:hi, $vreg_gpr1
> 
> There is no way of preventing copies completely.
> 
> Once you create a virtual register with some register class, you must
> support spilling, reloading, and copying of that register class.
> 
> The cross class spilling feature can make these things less frequent,
> but it can't make them go away completely.
> 
> /jakob
> 
> 



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