[LLVMdev] ARM aapcs calling convention for small vectors
Sebastien DELDON-GNB
sebastien.deldon at st.com
Fri Sep 21 08:13:23 PDT 2012
Hi all,
I was wondering if ARM aapcs calling convention defines how to pass small vectors as parameter to a routine.
By small vectors, I mean with size less than a 32-bit integer. For instance if we consider following code:
; ModuleID = 'smallvect.ll'
define arm_aapcscc void @foo(<2 x i8>* %p) {
L.entry:
%0 = load <2 x i8>* %p
call arm_aapcscc void @bar(<2 x i8> %0)
ret void
}
declare arm_aapcscc void @bar(<2 x i8> %a)
and we compile it using llc -march=arm -mcpu=cortex-a9 we got following assembly generated:
...
foo: @ @foo
@ BB#0: @ %L.entry
push {lr}
vld1.16 {d16[0]}, [r0, :16]
vmovl.u8 q8, d16
vmovl.u16 q8, d16
vmov r0, r1, d16
bl bar
pop {lr}
bx lr
.Ltmp0:
.size foo, .Ltmp0-foo
...
Hi and Low part of vector is passed to bar using r0, r1 register. I was thinking that only r0 could have been used since size of vector is 16-bits.
So is this behavior occuring because vector argument passing might not have been defined in ARM aapcs ?
Thanks for your answers
Seb
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