[LLVMdev] RE : Question about LLVM NEON intrinsics

[Renato Golin]

On 21 September 2012 10:57, Sebastien DELDON-GNB
<sebastien.deldon at st.com> wrote:
> You're pointing me at ARM intrinsics related to loads, problem that I've reported in original e-mail, is not support for vector loads, but support for 'vmaxs'. For instance, there is no vector loads of 16 floats in ARM ISA but it is legal to write in LLVM:

Oh, yes, sorry.

Still, Eli is right, you can't assume generic IR will convert to
platform-specific intrinsics automagically.

This is not a bug, but could be a feature, if you want to write a NEON
validator pass that pattern-matches generic LLVM IR operations into
the respective (semantically correct) NEON intrinsics, or at least
leave the IR operations in a state that the back-end will recognize
it.

Honestly, I prefer the approach to have the front-end writing generic
IR and having target-specific passes that will change the generic IR
to target specific, so the back-end can deal with it. But it seems
that the front-ends had to deal with that, so far, including the ones
I wrote. :/

-- 
cheers,
--renato

http://systemcall.org/