[LLVMdev] Predication on SIMD architectures and LLVM

[dag at cray.com]

Nadav Rotem <nrotem at apple.com> writes:

> One way would be to implement masked load and mask store
> intrinsics, and to place 'select' instructions in strategic locations:
> before instructions that may fault, before phi-nodes, etc. A
> pre-register allocation pass can propagate the masks to all of the
> instructions that need them.

How does this work if the load is not conditional but trapping
operations that use the loaded values are conditional?

Yes, such propagation can probably be done but it's painful and every
predicated target would have to implement it.  It's much easier to just
select the right operation in isel, I think, and that seems to require
IR support.

                              -David