[LLVMdev] Predication on SIMD architectures and LLVM

[dag at cray.com]

David Chisnall <David.Chisnall at cl.cam.ac.uk> writes:

> Perhaps I am missing something, but isn't a predicated instruction
> effectively an single-instruction version of an arithmetic operation
> followed by a select?  

No, it is not.  Among other things, predication is used to avoid traps.
A vector select is an entirely different operation.

> As we can already represent this in the IR, and already match other
> predicated instructions (e.g. on ARM) to this pattern, what is gained
> by adding predication directly to the IR?

Predicated loads, stores, divides, sqrts, etc. are essential for
correctly vectorizing loops with conditionals due to safety concerns.
If the loop body has no dangerous operations, then yes, a vector select
can be used without problems but it is often slower than predication.
Usually the hardware can optimize instructions with certain values of
predicates.

                              -David