[LLVMdev] Protecting a register value in the LLVM backend

[dag at cray.com]

Marcello Maggioni <hayarms at gmail.com> writes:

> I'm working on an LLVM backend for a new target architecture which has
> some instructions that when executed implicitly produce a result in a
> particular register after a certain amount of cycles.
>
> The situation is this :
>
> 1: Execute instruction
> 2: Wait for result
> 3: Wait for result
> 4: Wait for result
> 5: Read from register
>
> The value in the special register needs to be protected until the
> execution of instruction number 5.
> What I would like to do is to make it possible for the backend to
> schedule instructions that don't mess with this special register in
> anyway in-between the two Execute Instruction/Read register
> instructions. 

Why doesn't the existing dependence and instruction itineraries support
not work for this case?  X86 has all sorts of instructions that
implicitly define registers and it handles this problem quite well.

                             -David