[LLVMdev] A lenient construction mode?

[edA-qa mort-ora-y]

Is there a way to do a lenient construction of the IR? In particular one
that doesn't do type checking?

I am having the problem in my generator that occasionally I produce the
wrong type which leads to an abort during the construction phase. If I
were able to complete my construction and look at the textual assembly
I'd probably be able to see my mistake easier.

-- 
edA-qa mort-ora-y
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