[LLVMdev] [TableGen] How to specify multiple types to one register class.

[Lei Mou]

Hi all,

In our architecture, there is a set of general purpose registers which could be
used to store integer and floating point numbers. My problem is how to correctly
specify the type of this register class. For now, its type is
specified as i32, and
it is problematic if it is used in floating point instructions, since
tablegen cannot
correctly infer the type information of such a pattern. Here is an example:

    // Definition of the register class
    def RegCRF : RegisterClass<"Foo", [i32], 32, (sequence "R%u", 0, 255)>;

    // Tablegen: error: In FADD: Type inference contradiction found
    //           no floating point types found
    def FADD : InstFoo<(outs RegCRF:$d),
                       (ins RegCRF:$a, RegCRF:$b),
                       "FADD\t$d, $a, $b",
                       [(set RegCRF:$d, (fadd RegCRF:$a, RegCRF:$b))]>;

I also tried to type RegCRF as [i32, f32], but then the type inference error
appears in my load/store instructions, when RegCRF is used as an address
operand. So what is the correct way to solve this problem? Thank you in
advance!

Regards,
Lei Mou