[LLVMdev] RFC: ErLLVM - Implemented HiPE Calling Convention

[Kostis Sagonas]

On 04/24/12 17:10, Yiannis Tsiouris wrote:
> This patch (and the others that will follow) are rebased on svn r155440:
>
> "AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8
>   immediate. We can't use it here because the shuffle code does not check that
>   the lower part of the word is identical to the upper part"
>
> Patch 1/3:
>
> The attached commits add a new calling convention to support the LLVM backend
> for HiPE compiler, as described in a previous email. The corresponding commit
> messages are:

We understand that the LLVM developers may be busy, but any chance that 
we will get some reaction on this patch soon?

A five minute look at the changes in this patch will most probably 
reveal that the changes are non-intrusive and non-controversial and will 
allow us to proceed further in discussing the next two parts of the 
patch we would like to submit.

Thanks in advance,

Kostis Sagonas (for the ErLLVM team)

> 0001:
> | Implemented a new calling convention (cc 11) for HiPE similar to GHC's cc 10.
> | In detail:
> |  * Inserted new symbol "cc 11" (CallingConv::HiPE).
> |  * Created cc and retcc for both 32 and 64 bit.
> |  * HiPE cc defines no calleE-save registers.
> |  * HiPE cc supports tail call optimization.
>
> 0002:
> | Hack fix for GR32_TC registers.
> | Add EBX, EDI to GR32_TC register class to handle a "ran out of registers during
> | register allocation" in case of tailcall existance because in  EAX, ECX, EDX
> | are all argument registers in HiPE CC.