[LLVMdev] VLIWPacketizerList: failing to schedule terminators

[Tom Stellard]

Hi,

I'm trying to use the VLIWPacketizerList to schedule instructions for
the R600 target, and I'm running into this assertion failure:
ScheduleDAGInstrs.cpp:558: Cannot schedule terminators or labels!

I think I might not be using the VLIWPacketizerList class correctly.
I've attached my code to this email.  Can anyone spot what I'm doing
wrong?

Also, I had to add a LiveIntervals * parameter to the constructor of
this class in order to do pre-RA scheduling.


Thanks,
Tom
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#include "AMDGPU.h"
#include "llvm/PassRegistry.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"

using namespace llvm;

namespace {

class R600Packetizer : public VLIWPacketizerList {

public:

  R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI,
                 MachineDominatorTree &MDT, LiveIntervals * LIS);

  virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit * SUJ);

  virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit * SUJ);
};

R600Packetizer::R600Packetizer(MachineFunction &MF, MachineLoopInfo &MLI,
                               MachineDominatorTree &MDT, LiveIntervals * LIS) :
  VLIWPacketizerList(MF, MLI, MDT, false /* isPostRA */, LIS) { }

bool R600Packetizer::isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ)
{
  return true;
}

bool R600Packetizer::isLegalToPruneDependencies(SUnit *SUI, SUnit * SUJ)
{
  return false;
}

class R600PacketizeInstrsPass : public MachineFunctionPass {

public:

  static char ID;
  R600PacketizeInstrsPass(TargetMachine &tm) : MachineFunctionPass(ID) {
    initializeMachineDominatorTreePass(*PassRegistry::getPassRegistry());
    initializeMachineLoopInfoPass(*PassRegistry::getPassRegistry());
  }

  const char *getPassName() const {
    return "R600 Packetize Instructions";
  }
  virtual void getAnalysisUsage(AnalysisUsage &AU) const;
  bool runOnMachineFunction(MachineFunction &MF);
};

char R600PacketizeInstrsPass::ID = 0;

void R600PacketizeInstrsPass::getAnalysisUsage(AnalysisUsage &AU) const
{
  AU.addRequired<LiveIntervals>();
  AU.addRequired<MachineDominatorTree>();
  AU.addRequired<MachineLoopInfo>();
  MachineFunctionPass::getAnalysisUsage(AU);
}

bool R600PacketizeInstrsPass::runOnMachineFunction(MachineFunction &MF)
{
  MF.dump();
  MachineLoopInfo & MLI = getAnalysis<MachineLoopInfo>();
  MachineDominatorTree & MDT = getAnalysis<MachineDominatorTree>();
  LiveIntervals * LIS = &getAnalysis<LiveIntervals>();
  R600Packetizer packetizer(MF, MLI, MDT, LIS);

  for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
                                                  BB != BB_E; ++BB) {
    packetizer.PacketizeMIs(BB, BB->begin(), BB->end());
  }
  MF.dump();
  return false;
}

} // End anonymous namespace

FunctionPass *llvm::createR600PacketizeInstrsPass(TargetMachine &tm)
{
  return new R600PacketizeInstrsPass(tm);
}