[LLVMdev] Interactions between module and loop passes

[Pablo Barrio]

Hi all,

I have a code with three passes (one loop pass and two module passes) 
and my own pass manager. If I schedule the loop pass between the others, 
my code segfaults. Is there any explanation why loop passes cannot be 
scheduled between two module passes? Perhaps I misunderstood the 
behaviour of pass managers.

I paste here my "usage" information:

int main(...){

	Module m = ... //Read module
	PassManager pm;

	pm.add(new ModPass1);
	pm.add(new LoopPass);
	pm.add(new ModPass2);
	pm.run(m);

}

class ModPass1 : public ModulePass{

     virtual void getAnalysisUsage(AnalysisUsage&AU) const{
         AU.setPreservesAll();
     }
};

class LoopPass : public LoopPass{

	virtual void getAnalysisUsage(AnalysisUsage&AU) const{
		AU.setRequires<ModPass1>();
		AU.setPreservesAll();
     }
};

class ModPass2 : public ModulePass{

	virtual void getAnalysisUsage(AnalysisUsage&AU) const{

		AU.setRequires<LoopPass>();
		AU.setPreservesAll();
	}
};


If I remove any of the passes (updating the usage information), it's OK. 
If I transform the loop pass into a module pass, it also works.

Thanks ahead,

-- 
Pablo Barrio
Dpt. Electrical Engineering - Technical University of Madrid
Office C-203
Avda. Complutense s/n, 28040 Madrid
Tel. (+34) 915495700 ext. 4234
@: pbarrio at die.upm.es