[LLVMdev] Aliasing bug or feature?

[Eli Friedman]

On Thu, Mar 1, 2012 at 2:00 PM, Sergei Larin <slarin at codeaurora.org> wrote:
> Eli,
>
>  I might not have answered your question fully/accurately...
>
> On my architecture, these _two_ loads are lowered to a single instruction:
>
> %3 = load i8** @q, align 4, !tbaa !2
> %4 = load i8* %3, align 1, !tbaa !0
>
> Becomes
>
> i32,ch = LDw_GP_V4 0x3df4c70, 0x3df5470<Mem:LD4[@q](tbaa=!"any pointer")
>
> I guess what is happening, the alias properties of combined instruction are
> not updated properly, and I am not sure if this is something I need to do,
> or it is getting done "automatically" somewhere at DAG combine... Sorry.
> Still learning :)

Ah, that explains it: you've only attached one memory operand to an
instruction that reads from two memory locations.  You probably just
need to add the second memory operand.

-Eli