[LLVMdev] How to define macros in a tablegen file?
Sebastian Pop
spop at codeaurora.org
Tue Jun 19 15:38:51 PDT 2012
Hi,
I was wondering if there is a way to specify macros to help shorten
rewriting patterns like these:
def : Pat <(v4i8 (mul (v4i8 IntRegs:$a), (v4i8 IntRegs:$b))),
(v4i8
(VTRUNEHB
(v4i16
(VTRUNEWH
(v2i32
(VMPYH
(v2i16
(EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$a))), subreg_hireg)),
(v2i16
(EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$b))), subreg_hireg)))),
(v2i32
(VMPYH
(v2i16
(EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$a))), subreg_loreg)),
(v2i16
(EXTRACT_SUBREG (v4i16 (VSXTBH (v4i8 IntRegs:$b))), subreg_loreg)))))))
)>;
Basically if we have a way to name a dag foo to be this:
(EXTRACT_SUBREG (v4i16 (VSXTBH $X)), $Y)
and bar to stand for this:
(v2i32 (VMPYH (v2i16 (foo $X, $Z)), (v2i16 (foo $Y, $Z))))
then, I could write the same pattern in a shorter format:
def : Pat <(v4i8 (mul (v4i8 IntRegs:$a), (v4i8 IntRegs:$b))),
(v4i8
(VTRUNEHB
(v4i16
(VTRUNEWH (bar IntRegs:$a, IntRegs:$b, subreg_hireg),
(bar IntRegs:$a, IntRegs:$b, subreg_loreg)))))
>;
Thanks,
Sebastian
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