[LLVMdev] non-SSA IR generation

Jiesheng Wei jwei at ece.ubc.ca
Wed Jun 13 22:12:37 PDT 2012


I think Sean is right. If you want "real" SSA form, my sense is that you
may need to write your own passes and module verifier.

Thanks,
Jiesheng

On Wed, Jun 13, 2012 at 8:28 PM, Sean Silva <silvas at purdue.edu> wrote:

> Well, it *is* in SSA form, but it "cheats" by keeping values in memory.
>
> --Sean Silva
>
>
> On Wed, Jun 13, 2012 at 2:00 PM, Jiesheng Wei <jwei at ece.ubc.ca> wrote:
>
>> Hi Amruth,
>>
>> If you do not specify any optimization flag for 'clang' and do not run
>> 'opt -mem2reg' pass on the generated IR file, it is in non-SSA form.
>> However, many variables stay in memory instead of registers in this case.
>>
>> Thanks,
>> Jiesheng
>>
>> On Wed, Jun 13, 2012 at 1:17 PM, <amruth.rd at knights.ucf.edu> wrote:
>>
>>>  I am experimenting with LLVM optimizer and found that the bit code file
>>> *clang* emits is already in SSA form, but I want to generate it in
>>> non-SSA form. Would you let me know if there is any way of doing it?
>>>
>>> Cheera,
>>> Amruth
>>>
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>>
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