[LLVMdev] Assert in live update from MI scheduler.

[Andrew Trick]

On Jun 13, 2012, at 1:15 PM, Sergei Larin <slarin at codeaurora.org> wrote:

> Andy,
>  
>   You are probably right here – look at this – before phi elimination this code looks much more sane:
>  
> # *** IR Dump After Live Variable Analysis ***:
> # Machine code for function push: SSA
> Function Live Outs: %R0
>  
> BB#0: derived from LLVM BB %entry
>     %vreg5<def> = IMPLICIT_DEF; IntRegs:%vreg5
>     %vreg4<def> = TFRI_V4 <ga:@xx_stack>; IntRegs:%vreg4
>     Successors according to CFG: BB#1
>  
> BB#1: derived from LLVM BB %for.cond
>     Predecessors according to CFG: BB#0 BB#1
>     %vreg0<def> = PHI %vreg4, <BB#0>, %vreg3, <BB#1>; IntRegs:%vreg0,%vreg4,%vreg3
>     %vreg1<def> = PHI %vreg5, <BB#0>, %vreg2, <BB#1>; IntRegs:%vreg1,%vreg5,%vreg2
>     %vreg2<def> = LDriw %vreg0<kill>, 0; mem:LD4[%stack.0.in] IntRegs:%vreg2,%vreg0
>     %vreg3<def> = ADD_ri %vreg2, 8; IntRegs:%vreg3,%vreg2
>     %vreg6<def> = CMPEQri %vreg2, 0; PredRegs:%vreg6 IntRegs:%vreg2
>     JMP_cNot %vreg6<kill>, <BB#1>, %PC<imp-def>; PredRegs:%vreg6
>     JMP <BB#2>
>     Successors according to CFG: BB#2 BB#1
>  
> BB#2: derived from LLVM BB %for.end
>     Predecessors according to CFG: BB#1
>     %vreg7<def> = LDriw %vreg1<kill>, 0; mem:LD4[%first1](tbaa=!"any pointer") IntRegs:%vreg7,%vreg1
>     STriw_GP <ga:@yy_instr>, 0, %vreg7<kill>; mem:ST4[@yy_instr](tbaa=!"any pointer") IntRegs:%vreg7
>     %vreg8<def> = IMPLICIT_DEF; IntRegs:%vreg8
>     %R0<def> = COPY %vreg8<kill>; IntRegs:%vreg8
>     JMPR %PC<imp-def>, %R31<imp-use>, %R0<imp-use,kill>
>  
> Right after the dead vreg is introduced:
>  
> # *** IR Dump After Eliminate PHI nodes for register allocation ***:
> # Machine code for function push: Post SSA
> Function Live Outs: %R0
>  
> BB#0: derived from LLVM BB %entry
>     %vreg4<def> = TFRI_V4 <ga:@xx_stack>; IntRegs:%vreg4
>     %vreg9<def> = COPY %vreg4<kill>; IntRegs:%vreg9,%vreg4
>     Successors according to CFG: BB#1
>  
> BB#1: derived from LLVM BB %for.cond
>     Predecessors according to CFG: BB#0 BB#1
>     %vreg0<def> = COPY %vreg9<kill>; IntRegs:%vreg0,%vreg9
>     %vreg1<def> = COPY %vreg10<kill>; IntRegs:%vreg1,%vreg10 <<<<<<<<<<<<<<<<<<<<<<<<<<< Not defined on first iteration….
>     %vreg2<def> = LDriw %vreg0<kill>, 0; mem:LD4[%stack.0.in] IntRegs:%vreg2,%vreg0
>     %vreg3<def> = ADD_ri %vreg2, 8; IntRegs:%vreg3,%vreg2
>     %vreg6<def> = CMPEQri %vreg2, 0; PredRegs:%vreg6 IntRegs:%vreg2
>     %vreg9<def> = COPY %vreg3<kill>; IntRegs:%vreg9,%vreg3
>     %vreg10<def> = COPY %vreg2<kill>; IntRegs:%vreg10,%vreg2
>     JMP_cNot %vreg6<kill>, <BB#1>, %PC<imp-def>; PredRegs:%vreg6
>     JMP <BB#2>
>     Successors according to CFG: BB#2 BB#1
>  
> BB#2: derived from LLVM BB %for.end
>     Predecessors according to CFG: BB#1
>     %vreg7<def> = LDriw %vreg1<kill>, 0; mem:LD4[%first1](tbaa=!"any pointer") IntRegs:%vreg7,%vreg1
>     STriw_GP <ga:@yy_instr>, 0, %vreg7<kill>; mem:ST4[@yy_instr](tbaa=!"any pointer") IntRegs:%vreg7
>     %vreg8<def> = IMPLICIT_DEF; IntRegs:%vreg8
>     %R0<def> = COPY %vreg8<kill>; IntRegs:%vreg8
>     JMPR %PC<imp-def>, %R31<imp-use>, %R0<imp-use,kill>
>  
> # End machine code for function push.
>  
> So the problem is elsewhere after all…

Sergei,

If you don't want an undefined variable here, that's something you should look into. Otherwise, the machine code before phi elimination looks ok. Phi elimination is not doing everything I would like it to do in this case. I'll have to try constructing a test case by hand. Until I figure out the right fix, you may want to work around by disabling the SSA check in the scheduler.

Thanks
-Andy


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