[LLVMdev] llc support for ARM predication ?
James Molloy
James.Molloy at arm.com
Tue Jun 5 03:30:24 PDT 2012
Hi Seb,
That really depends on your workload. You should benchmark with both and choose the best.
Cheers,
James
________________________________________
From: Sebastien DELDON-GNB [sebastien.deldon at st.com]
Sent: 04 June 2012 17:30
To: James Molloy
Cc: llvmdev at cs.uiuc.edu; Sebastien DELDON-GNB
Subject: RE: [LLVMdev] llc support for ARM predication ?
Hi James,
Thanks for the answer, for Cortex-A9 would you recommend to generate thumb2 code or ARM code ? What would be the best performance wise ?
Best Regards
Seb
> -----Original Message-----
> From: James Molloy [mailto:james.molloy at arm.com]
> Sent: Thursday, May 31, 2012 9:57 AM
> To: Sebastien DELDON-GNB
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] llc support for ARM predication ?
>
> Hi Seb,
>
> The ARM instruction set is a fixed-width 32-bit instruction set that
> has
> been around since the early days of ARM.
>
> Modern (armv4t onwards) cores mostly have another instruction set that
> can be used in tandem, the "thumb" instruction set. This is a variable
> width (16 or 32 bit) instruction set that provides a subset of the ARM
> instruction set and was intended to provide the amount of functionality
> that compilers required and no more, to reduce codesize in compiled
> images.
>
> What was "thumb" became referred to as "thumb1" after "thumb2" was
> released (armv6t2), which added features such as condition execution
> (the IT, "if-then-else" instruction).
>
> The ARM architecture is numbered sequentially by evolution, so Thumb is
> available in v4t (meaning "v4 with Thumb extension") and Thumb-2 is
> available in v6t2.
>
> v7 includes Thumb-2 by default (for A-class cores such as Cortex-A8).
> So
> when specifying "thumbv7" as the architecture to LLVM, LLVM will
> generate Thumb-2 instructions and use IT instructions for conditional
> execution.
>
> Hope this helps,
>
> James
>
> On 30/05/12 23:34, Sebastien DELDON-GNB wrote:
> > Hi James,
> >
> > Thanks for the answer, can you elaborate on difference between thumb,
> thumb2, ARM, thumbv7.
> > I'm a bit lost right now. When specifying thumbv7 llc will generate
> thumb only code, not thumb2 ?
> >
> > Best Regards
> > Seb
> >
> >> -----Original Message-----
> >> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-
> bounces at cs.uiuc.edu]
> >> On Behalf Of James Molloy
> >> Sent: Tuesday, May 29, 2012 5:38 PM
> >> To: llvmdev at cs.uiuc.edu
> >> Subject: Re: [LLVMdev] llc support for ARM predication ?
> >>
> >> On 29/05/12 15:39, Sebastien DELDON-GNB wrote:
> >>> Hi all,
> >>>
> >>> I was wondering if 'llc' is able to generate 'it' instruction for
> ARM
> >> Cortex-A9 target ?
> >>> Thanks for your answers
> >>> Seb
> >>>
> >>> _______________________________________________
> >>> LLVM Developers mailing list
> >>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> >>>
> >> Hi Seb,
> >>
> >> Sure - llc can generate 'IT' instructions, but those are Thumb
> >> instructions so will only be generated with the target triple
> >> "thumbv7-..." instead of armv7.
> >>
> >> Cheers,
> >>
> >> James
> >>
> >>
> >> _______________________________________________
> >> LLVM Developers mailing list
> >> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> >> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
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