[LLVMdev] Vector promotion broken for <2 x [i8|i16]>

[Hal Finkel]

Micah,

One more thing ;) -- llvm::getEnumName
in utils/TableGen/CodeGenTarget.cpp

 -Hal 

On Tue, 31 Jul 2012 21:02:02 +0000
"Villmow, Micah" <Micah.Villmow at amd.com> wrote:

> Ahh yep, thanks for catching that, new patch attached.
> 
> > -----Original Message-----
> > From: Hal Finkel [mailto:hfinkel at anl.gov]
> > Sent: Tuesday, July 31, 2012 1:40 PM
> > To: Villmow, Micah
> > Cc: Developers Mailing List
> > Subject: Re: [LLVMdev] Vector promotion broken for <2 x [i8|i16]>
> > 
> > Micah,
> > 
> > I think that your patch is missing the necessary modifications in
> > lib/VMCore/ValueTypes.cpp to EVT::getEVTString() and
> > EVT::getTypeForEVT.
> > 
> >  -Hal
> > 
> > On Fri, 27 Jul 2012 22:54:24 +0000
> > "Villmow, Micah" <Micah.Villmow at amd.com> wrote:
> > 
> > > Vector promotion which is new in LLVM 3.1 is broken for sub32 bit
> > > types. The problem is in the VectorLegalizer::PromoteVectorOp. The
> > > function getTypeToPromoteTo will return a <2 x i32> for a <2 x
> > > i8>, <2 x i16> or <4 x i8>. The problem is that there are no
> > > i8>vectors of
> > > size 1 defined for i32 or i16. The attached patch fixes these
> > > issues.
> > >
> > > This can be reproduced by setting in any target:
> > > setOperationAction(ISD::AND, MVT::i8, Promote);
> > > setOperationAction(ISD::AND, MVT::v2i8, Promote);
> > > setOperationAction(ISD::AND, MVT::i16, Promote);
> > >
> > > Let me know if this is good,
> > > Micah
> > >
> > 
> > 
> > 
> > --
> > Hal Finkel
> > Postdoctoral Appointee
> > Leadership Computing Facility
> > Argonne National Laboratory
> 



-- 
Hal Finkel
Postdoctoral Appointee
Leadership Computing Facility
Argonne National Laboratory