[LLVMdev] Vector promotion broken for <2 x [i8|i16]>

[Villmow, Micah]

Vector promotion which is new in LLVM 3.1 is broken for sub32 bit types. The problem is in the VectorLegalizer::PromoteVectorOp.
The function getTypeToPromoteTo will return a <2 x i32> for a <2 x i8>, <2 x i16> or <4 x i8>. The problem is that there are no vectors of size 1 defined for i32 or i16. The attached patch fixes these issues.

This can be reproduced by setting in any target:
setOperationAction(ISD::AND, MVT::i8, Promote);
setOperationAction(ISD::AND, MVT::v2i8, Promote);
setOperationAction(ISD::AND, MVT::i16, Promote);

Let me know if this is good,
Micah

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120727/5e20d318/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: codegen_new_vec1_types.patch
Type: application/octet-stream
Size: 10556 bytes
Desc: codegen_new_vec1_types.patch
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120727/5e20d318/attachment.obj>