[LLVMdev] X86 sub_ss and sub_sd sub-register indexes

[Jakob Stoklund Olesen]

On Jul 26, 2012, at 11:16 AM, dag at cray.com wrote:

> Jakob Stoklund Olesen <jolesen at apple.com> writes:
> 
>>> If the 128-bit register is not ever used as a 128-bit register,
>>> shouldn't the coalescer pick the 64- or 32-bit register?
>> 
>> That optimization is not currently implemented for sub-registers. For
>> example, if you create a GR64 virtual register and only ever use the
>> sub_32bit sub-register, it would be possible to replace the virtual
>> register with a GR32 register. It's not impossible to do, but it
>> doesn't come up a lot.
> 
> It does come up a lot in vector code.  Extraction of scalar values from
> vectors is pretty common, especially given the limitations of SSE/AVX.
> Typically we have done this using EXTRACT_SUBREG.  So either we would
> have to prevent coalescing to avoid a 128-bit spill or we would always
> have to use a 128-bit spill even if we never use anything but the scalar
> value.
> 
> Neither option is a good one.

If you feel this is important, please file a PR with a test case where it matters. It is orthogonal to the topic of this thread.

/jakob