[LLVMdev] Switching between sibling/cousin registers via API calls

Villmow, Micah Micah.Villmow at amd.com
Tue Jul 17 16:05:52 PDT 2012


This looks interesting, my next question would be, how do you access them? For example, let us say I know that I am register that is within a Tuples2DSpc register class, how would I be able to select the opposite register?

I think the difference here is that I don't want to use both of them at the same time, I want to use one register in one instruction, and its sibling register in the next instruction.

From: Jim Grosbach [mailto:grosbach at apple.com]
Sent: Tuesday, July 17, 2012 3:51 PM
To: Villmow, Micah
Cc: Developers Mailing List
Subject: Re: [LLVMdev] Switching between sibling/cousin registers via API calls

Hi Micah,

This sounds somewhat similar to what ARM uses for the stride-by-two vector load instructions. For example, Tuples2DSpc. While not exactly what you're looking for, perhaps something along those lines would work?

-Jim

On Jul 17, 2012, at 3:24 PM, "Villmow, Micah" <Micah.Villmow at amd.com<mailto:Micah.Villmow at amd.com>> wrote:


I have a register hierarchy that looks like a binary tree.
v4 -> {v2, v2} -> {s, s}{s, s}(or, {x, y}, {z, w})

I have an instruction that can access the 2nd and/or 4th scalar and an
instruction that can access the 1st and/or 3rd scalar. What I need to do
is that given the first scalar, I need to be able to select the 2nd scalar,
or/and given the 3rd, select the 4th. I define a sibling register as a register
that has the same parent and a cousin as a register that has the same grandparent.
So 'x' is a cousin of 'w' because of the grandparent class and 'x' is a sibling
of 'y' because of the parent class.

I know I can move to parent/children registers via super/sub classes,
but is there any way in LLVM currently to easily select a cousin/sibling registers that
I am not seeing?

Currently what I've found to work is I do register - base_scalar_1 + base_scalar_2,
but this doesn't seem like the best solution since this has an implicit
assumption on the ordering of the enumerated register values.

Any ideas?

Thanks,
Micah


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