[LLVMdev] target hexagon and sparcv9 lead to llc crack

Dmitry N. Mikushin maemarcus at gmail.com
Tue Jul 3 01:49:53 PDT 2012


Dear Yang,

Sparc crash likely means the target backend does not know how to
implement particular non-native command with an equal set of
target-native commands (legalization). Maybe also needs specific
-mcpu?

Best,
- Dima.

2012/7/3 Triple Yang <triple.yang at gmail.com>:
> sorry,
> llc -march=hexagon -mcpu=hexagonv2 test.ll -o test.s
> works.
>
> 2012/7/3 Triple Yang <triple.yang at gmail.com>:
>> hi,
>>
>> does someone notice that llc options  "-march=hexagon"   and
>> "-march-sparcv9"    do not work well under llvm 3.1?
>>
>> Following is a brief description:
>> (1) test.c file
>>
>> int cmp(int i, int j) {
>>         return (i>j)?1:0;
>> }
>>
>> (2) test.ll file (clang -emit-llvm test.c -S -o test.ll)
>>
>> ; ModuleID = 'test.c'
>> target datalayout =
>> "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
>> target triple = "i386-pc-linux-gnu"
>>
>> define i32 @cmp(i32 %i, i32 %j) nounwind {
>> entry:
>>   %i.addr = alloca i32, align 4
>>   %j.addr = alloca i32, align 4
>>   store i32 %i, i32* %i.addr, align 4
>>   store i32 %j, i32* %j.addr, align 4
>>   %0 = load i32* %i.addr, align 4
>>   %1 = load i32* %j.addr, align 4
>>   %cmp = icmp sgt i32 %0, %1
>>   %cond = select i1 %cmp, i32 1, i32 0
>>   ret i32 %cond
>> }
>>
>> (3) llc -march=sparcv9 test.ll -o test.s
>>
>> ExpandIntegerResult #0: 0xaf38960: i64 = FrameIndex<1> [ORD=2] [ID=0]
>>
>> Do not know how to expand the result of this operator!
>> UNREACHABLE executed at
>> /home/yangyy/git.repo/llvm.git/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:1089!
>> 0  llc 0x08c2512b
>> Stack dump:
>> 0.      Program arguments: llc -march=sparcv9 test.ll -o test.s
>> 1.      Running pass 'Function Pass Manager' on module 'test.ll'.
>> 2.      Running pass 'SPARC DAG->DAG Pattern Instruction Selection' on
>> function '@cmp'
>> Aborted (core dumped)
>>
>> (4) llc -march=hexagon test.ll -o test.s
>>
>> '' is not a recognized processor for this target (ignoring processor)
>> 0  llc 0x08c2512b
>> Stack dump:
>> 0.      Program arguments: llc -march=hexagon test.ll -o test.s
>> 1.      Running pass 'Function Pass Manager' on module 'test.ll'.
>> 2.      Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on
>> function '@cmp'
>> Segmentation fault (core dumped)
>>
>> Can some one give a explanation?
>>
>> Best regard.
>>
>> --
>> 杨勇勇 (Yang Yongyong)
>
>
>
> --
> 杨勇勇 (Yang Yongyong)
>
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>




More information about the llvm-dev mailing list