[LLVMdev] widen_load fails on AVX

Rotem, Nadav nadav.rotem at intel.com
Wed Jan 11 08:47:27 PST 2012


Please file a bug report:

http://llvm.org/bugs/

-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Demikhovsky, Elena
Sent: Wednesday, January 11, 2012 16:46
To: Chris Lattner
Cc: llvmdev at cs.uiuc.edu
Subject: [LLVMdev] widen_load fails on AVX

Hello Chris,

We caught this failure:
./llc -mattr=+avx ../../test/CodeGen/X86/widen_load-2.ll
llc: LegalizeTypes.cpp:831: void llvm::DAGTypeLegalizer::SetSplitVector(llvm::SDValue, llvm::SDValue, llvm::SDValue): Assertion `Lo.getValueType().getVectorElementType() == Op.getValueType().getVectorElementType() && 2*Lo.getValueType().getVectorNumElements() == Op.getValueType().getVectorNumElements() && Hi.getValueType() == Lo.getValueType() && "Invalid type for split vector"' failed.

The illegal CONCAT_VECTOR node is created from LegalizeVectorTypes.cpp
DAGTypeLegalizer::GenWidenVectorLoads()

I saw that this code comes from your commit 112171

this is the reduced test
define void @add18i16(<18 x i16>* nocapture sret %ret, <18 x i16>* %bp) nounwind {
  %b = load <18 x i16>* %bp, align 16
  %x = add <18 x i16> zeroinitializer, %b
  store <18 x i16> %x, <18 x i16>* %ret, align 16
  ret void
}

Could you take a look, please.

Thanks.

- Elena

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