[LLVMdev] FW: RFC: Supporting different sized address space arithmetic

Eli Friedman eli.friedman at gmail.com
Thu Aug 30 15:03:09 PDT 2012


On Thu, Aug 30, 2012 at 2:38 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> Eli,
>  Here is an updated patch. This is a lot smaller based on your feedback and still solves the same problem.

The patch appears to be corrupt; can you regenerate it?

> For your comment on the IR changes, I'm reluctant to introduce changes there because really the backend is overriding the default behavior at a device specific level. The optimizations themselves can be dangerous, but still should produce correct results, this only allows the backend to optimize certain cases and is opt-in.

Suppose I have an array of ten pointers into some address-space which
uses 16-bit pointers, and the default pointer size is 64 bits.  How
many bytes in memory does that take?  To me, it seems like the obvious
answer is 20 bytes, but if you compute it using our current
TargetData, you'll come up with an answer of 80.  That can't work.

If your answer is that it should be 80, and the size of a pointer
isn't something the frontend/IR optimizers should be aware of, I'm not
sure your approach makes sense; you could just introduce custom
load/store nodes in your target which truncate the pointer, and you
wouldn't need to mess with the size of a pointer at all.

-Eli




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