[LLVMdev] x86 REP-prefixed instructions seem to be dropped by instruction decoder?

[Rafael Espíndola]

On 13 August 2012 12:02, Andrew Ruef <awruef at umd.edu> wrote:
> I think there's a bug somewhere in TableGen for the X86 disassembler
> emitter. The following test:
>
> $ echo "0xF3 0xA5" | ./bin/llvm-mc -disassemble
> .section        __TEXT,__text,regular,pure_instructions
>         movsd
>
> (from llvm trunk)
>
> 0xF3 is the REP prefix, so the printed instruction should be 'rep
> movsd', however all that is printed is 'movsd'. It seems that there is
> an instruction enum for REP_MOVSD, but it isn't emitted in the
> generated .inc file? Is this a bug/oversight, or is there something I
> don't understand about the instruction decoding infrastructure and the
> MCInst class?

It looks like a bug. Would you mind reporting it in llvm.org/bugs? Thanks.

Cheers,
Rafael