[LLVMdev] ARM eabi calling convention

[Bill Wendling]

On Aug 6, 2012, at 3:21 PM, Akira Hatanaka <ahatanak at gmail.com> wrote:

> When I compile this program
> 
> $ cat vararg1-main.c
> 
> typedef struct {
>   double d;
> } S0;
> 
> S0 g1;
> 
> void foo0(int a, ...);
> 
> int main(int argc, char **argv) {
>   S0 s0 = { 2.0 };
> 
>   foo0(1, s0);
> 
>   printf("%f\n", g1.d);
> 
>   return 0;
> }
> 
> with this command,
> 
> $ clang  -target arm-none-linux-gnueabi-gcc  -ccc-clang-archs armv7  -emit-llvm vararg1-main.c  -S -o vararg1-main.ll -O3
> 
> I get this bitcode.
> 
> $ cat vararg1-main.ll
> 
> define arm_aapcscc i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
> entry:
>   %0 = load [2 x i32]* bitcast (%struct.S0* @main.s0 to [2 x i32]*), align 8
>   tail call arm_aapcscc  void (i32, ...)* @foo0(i32 1, [2 x i32] %0) nounwind
>   %1 = load double* getelementptr inbounds (%struct.S0* @g1, i32 0, i32 0), align 8, !tbaa !0
>   %call = tail call arm_aapcscc  i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), double %1) nounwind
>   ret i32 0
> }
> 
> My understanding is that ARM eabi requires that structure S0 be 8-byte aligned when it is passed to function foo0, i.e. it should be passed in register r2 and r3.
> 
> Is there anything in the call to foo0 that informs the backend that %0 should be 8-byte aligned?
> 
>   tail call arm_aapcscc  void (i32, ...)* @foo0(i32 1, [2 x i32] %0) nounwind
> 
The load is 8-byte aligned.

-bw