[LLVMdev] 64 bit special purpose registers

[reed kotler]

On Mips 32 there is traditionally a 64 bit HI/LO register for the result 
of multiplying two 64 bit numbers.

There are corresponding instructions to load the LO and HI parts into 
individual 32 registers.

On Mips with the DSP ASE (an application specific extension), there are 
actual 4 such pairs of
registers.

Is there a way to have special purpose 64 bit registers without actually 
having to tell LLVM that you have a 64 bit processor?

But it's still possible to use the individual parts of the 64 register 
as temporaries.

The only true 64 bit operation is multiplying two 32 bit numbers.