[LLVMdev] PreRASched

[Jonas Paulsson]

Hi,

I wonder when the preRASched pass is planned to be available?

I wonder how one would best try to implement a pass in between RegCoalescer and RA. After RegCoalescer, the LiveVariables information seems broken (there are no Kills anywhere), and LiveVariables can't be rerun after SSA form is left. So, how could one rebuild LiveIntevals? For register allocation purposes - what would be the best way to rebuild LiveIntervals after a rescheduling that demands a rerun of SlotIndexes? Is this a simpler task now that RegCoalescer is not in need of any info anymore? Could perhaps LiveIntervals be built without LiveVariables then?

Thanks

/Jonas

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