[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction

[Akira Hatanaka]

Hi Anton,

I ran llc with -verify-coalescing. There were no error messages.
Then I added code in MipsPassConfig::addPreEmitPass() to prevent machine
verifier from running post delay -slot-filler, and ran llc again. Again,
there were no error messages.

This is the list of passes run after post-RA scheduling. machine verifier
is run twice after post RA scheduler (and CriticalAntiDepBreaker) is run.

      Post RA top-down list latency scheduler
      Verify generated machine code
      Analyze Machine Code For Garbage Collection
      Machine Block Frequency Analysis
      Branch Probability Basic Block Placement
      Verify generated machine code
      Mips Delay Slot Filler
      MachineDominator Tree Construction
      Machine Natural Loop Construction
      Mips Assembly Printer
      Delete Garbage Collector Information

On Tue, Apr 24, 2012 at 11:36 PM, Anton Korobeynikov <
anton at korobeynikov.info> wrote:

> Hi Akira,
>
> > When I add -verify-machineinstrs, it complains that there are
> instructions
> > after terminator instructions.
> Yes, -verify-machineinstrs and -verify-coalescing are your friends here :)
>
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
>
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