[LLVMdev] Disabling x87 instructions for a sub-target

Murali, Sriram sriram.murali at intel.com
Wed Apr 4 14:52:30 PDT 2012


Hi Christoph,
It is the second issue. I am finding each and every instruction that is not supported in the (pre-Pentium pro) arch, and disabling them one by one. I found a way to disable them in the X86InstrFPStack.td, by enforcing sub-target predicates in their definition.
For instance, if I disable:
UCOM_FPIr32, UCOM_FPIr64, and UCOM_FPIr80, it works. 

However, several lit-tests fail as a result of that. Therefore, I am still trying to figure it out. If you are working on it, it is good news indeed.

Thanks
Ram


-----Original Message-----
From: Christoph Erhardt [mailto:christoph at sicherha.de] 
Sent: Wednesday, April 04, 2012 5:03 PM
To: Murali, Sriram
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] Disabling x87 instructions for a sub-target

Hi Sriram,

I'm not sure if I understand your question correctly: Do you need to
generate code that contains no x87 floating-point instructions
altogether, but uses calls into a soft-float library instead? That
behaviour can be enabled using the "-soft-float" flag, as far as I know.

Or is it only about the fcomi* instructions, which are not supported by
pre-Pentium Pro chips? Then I have good news: I have been working on
getting this bug [1] fixed, and I'm planning to submit a patch within
the next few days (hopefully in time for the 3.1 release).

Best regards,
Christoph

[1] http://llvm.org/bugs/show_bug.cgi?id=6679

On 04/04/2012 21:45, Murali, Sriram wrote:
> Hello there,
> 
> I recently started working on the LLVM backend for a target that doesn't
> support x87 instructions.
> 
> Currently, I am in the process of completely disabling some x87
> instructions such as fcomi, fcompi,... for a specific sub-target. I also
> do not have SSE enabled for my sub-target, and llvm resorts to fcomi*
> instructions for FP compare instructions.
> 
>  
> 
> Is there a way to bypass the automatic optimization that generates the
> x87 instructions when SSE is disabled, and completely eliminate the code
> generation for the same(error out)?
> 
>  
> 
> Thanks
> 
>  
> 
> Sriram Murali
> 
> +1 (519) 772-2579
> 
>  
> 
> 
> 
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
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